EDAToolsCafe, the Worlds #1 EDA Web Portal.
Search:
HP Invent
  Home | EDAVision | Companies | Downloads | Interviews | News | Jobs | Resources | Books & Courses |  ItZnewz  | |  CaféTalk 
  Check Mail | Free Email | Submit Material | Universities | Designers Corner | Events | Demos | Membership | Fun Stuff | Weather | Advertise | e-Catalog Signup >> Site Tour <<
 Browse eCatalog:  Free subscription to EDA Daily News
eCatalogAsic & ICPCBFPGADesign Services
Email: 

News: Subscribe to NewsAgent |  Company News |  News Jump |  Post News
  EDA Company News

Submit Comments Printer Friendly Version

Mentor Graphics Commits to Linux for Programmable Logic Market

WILSONVILLE, Ore.--(BUSINESS WIRE)--May 8, 2001--Mentor Graphics Corp., (Nasdaq:MENT) the leader in programmable logic design solutions, today announced its strategy to provide the industry's first complete front-end solution for programmable logic design on the Linux platform.

Many of Mentor's customers are now creating both ASICs and FPGAs. They require tools that maximize flexibility and allow them to retain existing tools and methodologies.

With programmable device complexity increasing exponentially, the need for large networks of high-performance workstations and servers to run parallel tasks has never been more pressing. Linux has grown rapidly in the programmable logic design community because of the platform's ease of integration into different design environments. This movement is reflected in the overall EDA design environment operating system market.

``A full 24 percent of the respondents to Gartner Dataquest's recent 'EDA User Wants and Needs (Jan. 8, 2001)' study said that they intend to switch operating systems this year,'' said Gary Smith, principal EDA analyst for Gartner's Dataquest. ``By far, the largest number of that 24 percent intends to switch to Linux.''

``The availability of Linux-based tools provides a cost-effective compute option for the programmable logic design flow,'' said John Daane, Altera's CEO. ``Our System-On-a-Programmable-Chip (SOPC) device architectures push the limits of integration and demand high-performance tools. Linux-based PCs offer a high-performance system-level design platform. Mentor has worked closely with Altera to ensure that its front-end tool suite integrates well with our industry leading Quartus(TM) II development product.''

``The complexity of programmable logic design has increased at a staggering rate, and the market is looking for high-performance, cost-efficient platform solutions to address this issue,'' said Dr. Walden C. Rhines, Mentor Graphics Chairman of the Board and CEO. ``We have been in the Linux market for more than two years with compute-intensive applications such as simulation and physical verification. Today's announcement extends our Linux strategy to the programmable logic market with an end-to-end, Linux-based solution for programmable logic design.''

First Wave of Tools Addresses HDL Design Needs

The first wave of tools and solutions that Mentor Graphics will provide to programmable logic designers includes all products in the company's HDL Design Division. The ModelSim® tool is the company's industry leading simulation tool and has supported Linux since 1999. Joining ModelSim are: LeonardoSpectrum(TM) for high-performance synthesis, HDL Pilot(TM) for design management, HDL Detective(TM) for analysis and documentation, HDL Author(TM) for text and graphical creation, and FPGA Advantage® for a complete programmable logic solution in one environment. Products are expected to ship in close coordination with availability of programmable logic vendor place and route tools. Additional tools and solutions will be made available based on market demand.

About Mentor Graphics

Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products and consulting services for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of more than $600 million and employs approximately 2,850 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.

Mentor Graphics, ModelSim and FPGA Advantage are registered trademarks of Mentor Graphics Corporation. HDL Author, HDL Detective, HDL Pilot and LeonardoSpectrum are trademarks for Mentor Graphics Corp. Quartus is a trademark of Altera Corp. All other company or product names are the registered trademarks or trademarks of their respective owners.


Contact:
     Mentor Graphics
     Amy Malagamba, 503/685-7836
     amy_malagamba@mentor.com
      or
     Benjamin Group/BSMG Worldwide
     Jeremiah Glodoveza, 415/352-2628 ext. 559
     jeremiah@benjamingroup.com

Copyright 2001, Internet Business Systems, Inc.
1-888-44-WEB-44 --- marketing@ibsystems.com